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Large Current External FET Controller Type Switching Regulators
Single/Dual-output High-frequency Step-down Switching Regulator(Controller type)
BD9853AFV
No.09028EAT05
Description The BD9853AFV is a 2-ch synchronous DC/DC controller that can operate at a maximum switching frequency of 2MHz, enabling the use of a smaller external coil than conventional lower-frequency switching regulators. This makes the BD9853AFV a suitable choice for downsizing applications. Features 1) Synchronous Switching Regulator Controller 2channels 2) FET(Pch/Nch) Direct Drive 3) Adjustable Oscillator Frequency with External Resistor (Max. 2MHz) 4) Under Voltage Lockout Function (UVLO) 5) Thermal Shut Down Function (TSD) 6) Short Circuit Protection (SCP) 7) Independent ON/OFF Function in Each Channel with Soft Start Pin 8) SSOP-B16 Package
SSOPB16
Applications TVSTB, PC, Portable CDDVD,DVC etc. Absolute Maximum Ratings (Ta = 25) Parameter Supply Voltage (VCC-GND) VREGA-GND Voltage VCC-VREGB Voltage Power Dissipation Operating Temperature Range Junction Temperature Storage Temperature Range
*
Symbol Vcc VREGA VREGB Pd Topr Tjmax Tstg
Limits 18 7 7 562(*1) -40 to +85 +150 -55 to +150
Unit V V V mW
Reduced by 4.49mW for each increase in Ta of 1 over 25 (When mounted on a board 70x70x1.6tmm grass-epoxy PCB)
Recommended Operating Conditions Parameter Supply Voltage Oscillator Frequency Symbol Vcc fosc Limits Min. 4.5 100 Typ. 12 1000 Max. 16 2000 Unit V KHz
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1/16
2009.05 - Rev.A
BD9853AFV
Electrical Characteristics (Unless otherwise specified Ta=25,Vcc=12V,fosc=1000kHz,STB=3V) Limits Parameter Symbol Unit Min. Typ. Max. Whole Device Standby Current Circuit Current Regulator for Driver REGA Output Voltage Output Current Capability Regulator for Driver REGB Output Voltage Output Current Capability Oscillator Oscillator Frequency Oscillator Frequency Coefficient1 Oscillator Frequency Coefficient2 Error Amplifier Threshold Voltage Input Bias Current Voltage Gain Max. Output Voltage Min. Output Voltage Output Sink Current Output Source Current PWM Comparator 0% Threshold Voltage 100% Threshold Voltage
*
Technical Note
Conditions
Iccst Icc Vrega Irega Vregb Iregb
4.5 VCC-5.5 100
0 3.2 5.0 VCC-5.0
5 5.2 5.5 -100 VCC-4.5
A mA V mA V mA
STB=0V INV1,INV2=2.5V
Vrega > 4.5V
Vregb < Vcc-4.5V RRT=8.2k OUTH=2200pF,OUTL=1000pF Vcc=4.5 to 5V Vcc=5 to 18V
fosc Dfosc1 Dfosc2 Vthea Ibias Av Vfbh Vfbl Isink Isource Vth0 Vth100
900 -2 -2 0.79 -230 60 Vrega-0.85 2 1.4 2.4
1000 0 0 0.80 -115 80 11 -15 1.5 2.5
1100 2 2 0.81 100 0.85 -2 1.6 2.6
kHz % % V nA dB V V mA mA V V
DC GAIN
INV=2.5V, FB=2.5V INV=0V, FB=2.5V FB Voltage FB Voltage
This product is not designed for the protection against radioactive rays.
ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM
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2/16
2009.05 - Rev.A
BD9853AFV
Technical Note
Electrical Characteristics (Unless otherwise specified, Ta=25,Vcc=12V,fosc=1000kHz,STB=3V) Limits Parameter Symbol Unit Conditions Min. Typ. Max. FET Driver On Resistance (OUT1H) On Resistance (OUT1L) On Resistance (OUT2H) On Resistance (OUT2L) Dead Time(Turn ON) Dead Time(Turn OFF) Control Block Threshold Voltage Sink Current Soft Start Block Soft Start Start-yo Voltage Vstasoft Standby Voltage Source Current Timer Start Voltage Threshold Voltage Standby Voltage Source Current Threshold Voltage Hysteresis Voltage
* *
RonP RonN RonP RonN RonP RonN RonP RonN tdtON tdtOFF Vstb Istb
1.6 1.7 1.6 1.7 1.6 1.7 1.6 1.7 30 25 0.6 6 0.2 -3.2 0.50 2.2 1.21 -3.2 4.0 0.05
3.2 3.4 3.2 3.4 3.2 3.4 3.2 3.4 70 60 1.5 15 0.3 -2.3 0.56 2.3 1.35 -2.3 4.15 0.1
4.8 5.1 4.8 5.1 4.5 5.1 4.8 5.1 120 115 2.4 30 0.4 40 -1.4 0.62 2.4 1.49 -1.4 4.30 0.15
ns ns V A V mV A V V V A V V
OUT=Hi OUT=Lo OUT=Hi OUT=Lo OUT=Hi OUT=Lo OUT=Hi OUT=Lo *OUTH,L HL,OUTH=2200pF,OUTL=1000pF *OUTH,L HL,OUTH=2200pF,OUTL=1000pF
Output OFF when Vscp/SOFTVstass SCP/SOFT Voltage Vscp/SOFT=0.6V INV Voltage SCP/SOFT Voltage SCP/SOFT Voltage (When soft start ends) SCP/SOFT=1.8V Vcc sweep down
Vstsoft Isosoft Vtime Vthscp Vstscp Isoscp Vuvlo DVuvlo
Short Circuit Protection (SCP)
Under Voltage Lockout (UVLO)
This product is not designed for the protection against radioactive rays. Measurement of dead time
Turn ON
OUTH VCC-2.5V OUTL 2.5V OUTL tdtON VCC-2.5V OUTH
Turn OFF
2.5V tdtOFF
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3/16
2009.05 - Rev.A
BD9853AFV
Characteristic Data
100 90 80
Technical Note
70 60 50 40 30 20 10 0 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0 2.1 2.2 2.3 2.4 2.5 2.6
OUTL
OUTH
FB VOLTAGE:VFB[V]
180 160 140 120 100 80 60 40 20 0 -20 -40 -60 -80 -100 -120 -140 -160 -180 0.01
Phase
Gain
20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
GAIN[dB]PHASE[deg]
FB SINK CURRENT[mA]
100 1000 10000 100000
ONDUTY[%]
0.1
1
10
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 3.8 4
FREQUENCY[KHz]
FB VOLTAGE[V]
Fig.1 FB VOLTAGE VS ON DUTY
Fig.2 ERROR AMP OPEN LOOP
Fig.3 FB SINK CURRENT
0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -15 -16 -17 -18 -19 -20 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 3.8 4 4.2 4.4
1000 950 900 850 800 750 700 650 600 550 500 450 400 350 300 250 200 150 100 50 0
VCC=12V,18V
4
VCC=4.5V
1000 950 900 850 800 750 700 650 600 550 500 450 400 350 300 250 200 150 100 50 0
OUTH SOURCE CURRENT:IOUT[mA]
OUTH SINK CURRENT:IOUT[mA]
FB SOURCE CURRENT[mA]
VCC=12V,18V
VCC=4.5V
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.8 4.0
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.8 4.0
FB VOLTAGE[V]
(REGB-OUTH) VOLTAGE[V]
(VCC-OUTH) VOLTAGE:[V]
Fig.4 FB SOURCE CURRENT
Fig.5 OUTH SINK CURRENT
Fig.6 OUTH SOURCE CURRENT
1000 950 900 850 800 750 700 650 600 550 500 450 400 350 300 250 200 150 100 50 0
VCC=12V,18V
VCC=4.5V
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.8 4.0
1000 950 900 850 800 750 700 650 600 550 500 450 400 350 300 250 200 150 100 50 0
OUTL SOURCE CURRENT:IOUT[mA]
OUTL SINK CURRENT:IOUT[mA]
VCC=12V,18V
VCC=4.5V
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.8 4.0
(OUTL-GND) VOLTAGE[V]
(REGA-OUTL) VOLTAGE[V]
Fig.7 OUTL SINK CURRENT
Fig.8 OUTL SOURCE CURRENT
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4/16
2009.05 - Rev.A
BD9853AFV
Block Diagram
VCC VCC both channel ON/OFF STB REGA VCC REGB
Technical Note
5V
REGA
FB1 VOUT1
VCC-5V
REGB
SOFT1 TSD VREF VCC VCC
INV1
OUT1H
Pch VOUT1
0.8V
REGA REGB
OUT1L Nch
SCP/SOFT1
(Push-Pull)
GND FB2 VOUT2 SOFT2 VCC INV2 OUT2H VCC 0.56V
Pch VOUT2
SCP/SOFT2
RT
0.8V (Push-Pull)
REGA
REGB
OUT2L Nch
OSC GND GND Timer Latch
Fig. 9
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5/16
2009.05 - Rev.A
BD9853AFV
Pin Configuration
Technical Note
Fig. 10
Pin Description Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Pin Name VCC OUT1H OUT1L REGA RT FB1 INV1 SCP/SOFT1 SCP/SOFT2 INV2 FB2 GND STB OUT2L OUT2H REGB Input Supply Voltage High Side (Main) FET Driver Output Pin (CH1) Low Side (Synchronous) FET Driver Output Pin (CH1) Internal Regulator Output Pin (5V Output, 1uF Ceramic Capacitor necessary) Oscillator Frequency Adjustment Pin with external Resistor Error Amplifier Output Pin (CH1) Error Amplifer Negative Input Pin (CH1) Short Circuit ProtectionSoft Start Delay Time Setting Pin with External Capacitor (CH1) Short Circuit ProtectionSoft Start Delay Time Setting Pin with External Capacitor (CH2) Error Amplifer Negative Input Pin (CH2) Error Amplifier Output Pin (CH2) Ground Pin ON/OFF Control Pin Low Side (Synchronous) FET Driver Output Pin (CH2) High Side (Main) FET Driver Output Pin (CH2) Internal Regulator Output Pin (VCC-5V Output, 1uF Ceramic Capacitor necessary) Pin Descriptions
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6/16
2009.05 - Rev.A
BD9853AFV
Technical Note
Block functional descriptions Triangular wave oscillator Connecting the resistor that sets the triangular wave oscillation frequency at the RT terminal generates the triangular wave, which is input into the CH1 and CH2 PWM comparator. Error amp The INV pin detects the output voltage, compares it to the programmed output voltage and amplifies the difference for output by the FB pin. (The 0.8V reference is the comparison voltage. The tolerance is 1.25%.) PWM comparator The PWM comparator converts the error amp (FB) voltage into a pulse width modulated waveform that goes to the FET driver and turns FET output ON. FET driver The push-pull FET driver directly drives the external MOSFET,providing high-side(OUT1H,OUT2H) switching at voltages between VccREGB, and low-side switching in the 0REGA voltage range. (REGA = 5V; REGB= VCC -5V internal power) Standby function The standby function enables output ON/OFF control by the STB pin. Output is ON when STB voltage is HIGH. With the STB pin set HIGH, the output ON/OFF for each channel can be independently controlled by one of the SCP/SOFT1, 2 pins. Soft Start/Short Circuit Protection (SCP) Connecting the external capacitor on the SCP/SOFT1, 2 pins sets the SCP delay time and soft start time. When STB is HIGH and the IC starts up, the capacitors on the SCP/SOFT1, 2 pins charge up at 2uA, stabilizing when the system reaches 1.3V. If load conditions change rapidly, causing the output voltage in either channel to fall to 70% or less of the set output voltage (INV voltage 0.56 or lower), the SCP/SOFT1, 2 external capacitors will charge further until output for both channels switches OFF at 2.3V. Under Voltage Lockout (UVLO) Under Voltage lockout prevents IC malfunctions that could otherwise occur due to intermittent or fluctuating power supply voltage, or insufficient voltage during start-up.When the VCC voltage falls to 4.1V or below, both channel outputs are turned OFF, while the SCP/SOFT1, 2 pins are simultaneously set LOW. The UVLO detection voltage includes 0.1V hysteresis width to prevent malfunctions from input voltage fluctuations. Thermal Shutdown (TSD) The TSD circuit protects the IC against thermal runaway and heat damage. The TSD thermal sensor detects junction temperature. When the temperature reaches the TSD threshold (175), the circuit switches the output of both channels OFF, and also switches REGA and REGB OFF. At the same time, it sets the SCP/SOFT1, 2 pins LOW. The hysteresis width (15) provided between the TSD function start temperature (threshold) and the stop temperature serves to prevent malfunctions from temperature fluctuations.
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7/16
2009.05 - Rev.A
BD9853AFV
Timing Chart
STB
STB ON STB OFF
Technical Note
Output OFF at SCP/SOFT<0.3V
SCP protection OFF
Vo1(solid line) INV1 (dotted line)
0.8V
1.3V
External GND short (independent control)
SCP/SOFT1 0.3V
Sort removed
Output short
Vo2 (solid line) INV2 (dotted line)
0.8V
2.3V
1.3V SCP/SOFT2 0.3V
End SCP delay
Fig. 11
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8/16
2009.05 - Rev.A
BD9853AFV
Application component selection and settings Determining output voltage Output voltage is determined by dividing the resistance of the external resistors. VOUT0.8Vx(1 + R2/R1)
Technical Note
VOUT R2 INV
R1
determining the oscillation frequency The oscillation pin is set by the resistor connected to the RT terminal (5 PIN).
10.000
Oscillating Frequency(MHz)
1.000
RT
0.100
RRT
0.010
0.001 1 10 100 1000
T iming Res is t a nce(k )
Selecting the external MOSFET In the BD9853AFV design, the main side (OUT1H, OUT2H) is provided with an external PCH FET, while an NCH FET is used on the synchronous rectification side (OUT1L, OUT 2L) . FET selection should be made in conformance with the following relative configurations for maximum drain voltage (VDSS), maximum gate source voltage (VGS), maximum output current, on-resistance RDS (ON) and gate capacitance (Ciss) loss: Maximum drain voltage (VDSS) is higher than the IC's maximum input voltage (VIN). Maximum gate source voltage is higher than the IC gate driving voltage (REGA, VCC-REGB). Maximum output current is higher than the combined maximum load current and coil ripple current (IL). The sum of on-resistance RDS (ON) and gate capacitance (Ciss) conduction loss, together with the switching loss, must not exceed the power dissipation (pd) for the package. FET conduction loss Phigh and Plow are defined as follows: 2 (PMOS conduction loss) Phigh=Iout xRDS(ON)xVOUT/VIN 2 Plow=Iout xRDS(ON)x(1-VOUT/VIN) (NMOS conduction loss) Ioutoutput load current, RDS(ON) : FET ON resistance value, VIN : input voltage, Vout : output voltage FET switching loss PSW is calculated as follows: PSW=VIN/2x(tr + tf)xfoscxIout VIN : input voltage, tr : drain waveform rise time, tf : drain waveform fall time, fosc : oscillation frequency, lout : load current In addition to the criteria for selecting individual MOSFET components, consideration must also be given to the combination of the PMOS (main side) and NMOS (synchronous side) to be used. The configuration must not generate any through current with PMOS and NMOS both ON at the same time. In order to meet this condition, the following formula must be satisfied, where PCH, NCH MOSFET turn-on delay time is represented as tdON, MOSFET turn-off delay time is tdOFF, and dead time is tdt. tdt > tdON - tdOFF The tdt turn-on is (OUTH,OUTLHL)70ns typ. Turn-off is OUTH,OUTLLH)70ns typ. Be sure to confirm that the process delay time does not pose problem in terms of the overall MOSFET delay. The following MOSFETs meet all of the selection criteria outlined above, and are recommended for use. Both are manufactured by ROHM. PCH: RSS040PO3 NCH: RSS065P03
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9/16
2009.05 - Rev.A
BD9853AFV
Technical Note
Selecting the synchronous diode An extremely low forward voltage Schottky barrier diode should be employed as the synchronous diode. Selection of the specific diode to be used should be made in conformance with the following relative configurations for maximum forward current, reverse voltage and diode power dissipation. The maximum current rating is higher than the combined maximum load current and coil ripple current (IL). The reverse voltage rating is higher than the VIN value. Power dissipation for the selected diode must be within the rated level. Synchronous diode power dissipation (Pdi) is expressed in the following formula: Pdi=Iout(MAX)xtdtxfoscxVf Iout(MAX) : maximum load current, tdt dead time 60ns typ,fosc : oscillation frequency, Vfforward voltage Selecting the output/input coil The output coil and the output capacitor together form a second-order smoothing filter for the switch waveform and provide the DC output voltage. If a coil's inductor value is low, its physical size is minimized, but the penalty is higher ripple current, with lowered efficiency and an increase in output noise. Conversely, a higher inductor value increases the size of the coil, but lowers the ripple current and, consequently. the output ripple current. Generally speaking, ripple current should be between 20% and 50% of output load current. The following equation is used to calculate the inductor value that corresponds to the ripple current value being employed. (VINVOUT) L= IL x VOUT VIN x 1 fOSC IL =(0.2 to 0.5)xIOUT
, Linductor value, VINmaximum input voltage, VOUToutput voltage, ILcoil ripple current value foscoscillation frequency, IOUToutput load current Note that the current rating for the coil should be higher than IOUT(MAX)IL. Selecting the input capacitor The input capacitor is the source of current that flows to the coil via the FET whenever the high side MOSFET is ON. In selecting an input capacitor, sufficient margin must be provided to accommodate capacitor pressure and the permissible ripple current. The expression below defines the effective value of the ripple current to the input capacitor. It should be used in determining the suitability of the capacitor in providing sufficient margin for the permissible ripple current. IRMSIOUTx (1VOUT/VIN)xVOUT/VIN IRMS : effective value of the ripple current to the input capacitor IOUT : output load current Selecting the output capacitor The output capacitor should confine ESR and permissible ripple current within a stable region. Although incorporating a low-ESR capacitor will limit ripple voltage and load fluctuation, it can also hurt the stability of the feedback network. Therefore, in order to maintain a stable feedback loop when ceramic or other low-ESR capacitors are employed, special attention must be paid to providing an appropriate phase compensation scheme. A suitable output capacitor will satisfy the following formula for ESR. ESRVL/IL VL : permissible ripple voltage, IL : coil ripple current In addition, use the following formula to determine the effective value of the output capacitance permissible ripple current, and select a capacitor that allows sufficient margin to accommodate this value. IRMS =IL/23 IRMS : effective value of ripple current to the output condenser, IL : coil ripple current Setting the soft start time To prevent output voltage startup overshoot on either channel, the capacitors connected to the SCP/SOFT 1, 2 pins - in a discharged state at power-on - are gradually charged during a delay interval, thus providing a soft start. The soft start period is the time from when the standby pins go from LOW to HIGH, starting the charge, to the time that the output voltage reaches the programmed setting. The soft start time is calculated in the following equation: tsoft 0.8[V] (typ)xCscp/soft F Isosoft (typ: 2.3A)[A]
tsoft : soft start time, Cscp/soft : SCP/SOFT pin connection capacitance, Isosoft : charge current
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10/16
2009.05 - Rev.A
BD9853AFV
Technical Note
Setting the Short Circuit Protection (SCP) delay time When the soft start is complete for each channel, the output voltage stabilizes at the set value 1.35V(typ) for the SCP/SOFT1, 2 pins. When any type of short circuit occurs, the voltage at the point of the fault is reduced. In this case, when voltage at the INV pin falls to 0.56V(typ) or below, the SCP comparator sensor detects the short and further charges the SCP/SOFT pins for the shorted channel from the 1.35V(typ) level. When the SCP/SOFT pins are charged to 2.3V(typ), the Pch/Nch MOSFET is switched OFF. The elapsed time from the occurrence of the output short to the point the external FET switches OFF is calculated with the following formula: 0.95[V](typ)xCscp/softF tscp Isosofc (typ: 2.3A)[A]
tscp : SCP delay time, Cscp/soft : SCP/SOFT pin connection capacitance,Isoscp : charge current
* If the current more than the capacity of power supply when the short between VOUT and GND occurs, input voltage starts to fall and under voltage lockout (UVLO) is activated at Vin < 4.15 V (typ.). The UVLO has FET driver output (OUT1H, OUT2H, OUT1L, OUT2L) off and external FETs become off. When external FETs are not operating, input voltage returns because of the short between VOUT and GND and the UVLO is canceled. But input voltage starts to fall again because the UVLO is not activated. There is possibility that a series of behavior "output short input voltage fall UVLO activated external FETs off input voltage returns UVLO canceled output short". So please make provision like inserting FUSE in input line.
Pin conditions with the only single channel use Pin conditions are shown in the following, when the only single channel out of 2 channels is used. Use only CH1 SCP/SOFT2, INV2 GND short FB2, OUT2H, OUT2L OPEN Use only CH2 SCP/SOFT1, INV1 GND short FB1, OUT1H, OUT1L OPEN
Application example
VCC
VCC
VCC
1F 4.7F
0.1F REGB OUT2H OUT2L STB GND FB2 INV2 SCP/SOFT2
4.7F
RSS040P03 (ROHM)
1 2 3 1F 4
8.2k
VCC OUT1H OUT1L REGA RT FB1 INV1 SCP/SOFT1
16 15 14 13 12 11 10 9
0.015F
RSS040P03 (ROHM)
VOUT1 (3.3V)
4.7H C6-K3L (MITSUMI)
4.7H C6-K3L (MITSUMI)
VCC RB081 L-20
220pF 3.3k
VOUT2 (2.5V)
10k 120pF
22k
10F (ceramic
RB081 L-20
(ROHM)
5 RSS065 10k 680pF NO3 7
(ROHM)
6
10F (ceramic
100k
15k 68pF
100k
RSS065 NO3
(ROHM)
(ROHM)
39k
8
0.015F
47k
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11/16
2009.05 - Rev.A
BD9853AFV
I/O Equivalent Circuit OUT1H(2),OUT2H(15) Max ratings7V(from VCC or REGB)
VCC
Technical Note
OUT1L(3),OUT2L(14) Max ratings7V
REGA VCC
REGA(4) Max ratings7V
VCC
OUT1H OUT2H
OUT1L OUT2L
REGA
REGB
RT(5) Max ratings7V REGA
FB1(6),FB2(11) Max ratings7V
REGA VCC
INV1(7),INV2(10) Max ratings10V
VCC
VCC
INV1 INV2
RT
SCP/SOFT1(8),SCP/SOFT2(9) Max ratings7V
VREF REGA VCC
STB(13) Max ratings18V
VCC
REGB(16) Max ratings7V(fromVCC)
VCC
REGB
STB
SCP/SOFT1 SCP/SOFT2
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12/16
2009.05 - Rev.A
BD9853AFV
Recommended Board Patterns
Technical Note
VOUT PMOS
L
CIN GND(IC)
N MOS
INV SBD COUT
GND(others)
There are two current loops at the behavior of switching regulator. When laying a pattern on the board, put these elements near to minimize these current loops and make the lines as short and wide as possible. And connect all GND lines at one point to reduce effects caused by above current noise to other lines. a pattern example of switching part
L COUT
SBD
PMOS NMOS
C
IN
Place following parts with attention about patterns
VCC
CREGB
REGB
GND
CVCC
1 2 3
VCC
REGB
16 15 14
CREGA
4 5 6 7 8
REGA RT
13 12 11 10 9
GND
RRT
Place CVCC, CREGA, RRT, CREGB as near to the pin as possible. Pattern area has to be small enough to reduce parasitic capacitance with RT terminal.
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13/16
2009.05 - Rev.A
BD9853AFV
Technical Note
Notes for use 1) Absolute maximum ratings Use of the IC in excess of absolute maximum ratings such as the applied voltage or operating temperature range may result in IC deterioration or damage. Assumptions should not be made regarding the state of the IC (short mode or open mode) when such damage is suffered. A physical safety measure such as a fuse should be implemented when use of the IC in a special mode where the absolute maximum ratings may be exceeded is anticipated. 2) GND potential Ensure a minimum GND pin potential in all operating conditions. In addition, ensure that no pins other than the GND pin carry a voltage lower than or equal to the GND pin, including during actual transient phenomena. 3) Thermal design Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions. 4) Inter-pin shorts and mounting errors Use caution when orienting and positioning the IC for mounting on printed circuit boards. Improper mounting may result in damage to the IC. Shorts between output pins or between output pins and the power supply and GND pin caused by the presence of a foreign object may result in damage to the IC. 5) Operation in a strong electromagnetic field Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to malfunction. 6) Thermal shutdown circuit (TSD circuit) This IC incorporates a built-in thermal shutdown circuit (TSD circuit). The TSD circuit is designed only to shut the IC off to prevent runaway thermal operation. Do not continue to use the IC after operating this circuit or use the IC in an environment where the operation of the thermal shutdown circuit is assumed. 7) Testing on application boards When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress. Always discharge capacitors after each process or step. Ground the IC during assembly steps as an antistatic measure, and use similar caution when transporting or storing the IC. Always turn the IC's power supply off before connecting it to or removing it from a jig or fixture during the inspection process. 8) Common impedance Power supply and ground wiring should reflect consideration of the need to lower common impedance and minimize ripple as much as possible (by making wiring as short and thick as possible or rejecting ripple by incorporating inductance and capacitance). 9) Applications with modes that reverse VCC and pin potentials may cause damage to internal IC circuits. For example, such damage might occur when VCC is shorted with the GND pin while an external capacitor is charged. It is recommended to insert a diode for preventing back current flow in series with VCC or bypass diodes between VCC and each pin.
Bypass diode
Back current prevention diode
VCC
Output Pin
10) Pin short and mistake fitting Do not short-circuit between OUT pin and VCC pin, OUT pin and GND pin, or VCC pin and GND pin. When soldering the IC on circuit board, please be unusually cautious about the orientation and the position of the IC. 11) Timing resistor and capacitor Timing resistor connected between RT and GND, has to be placed near RT terminal. And pattern has to be short enough.
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14/16
2009.05 - Rev.A
BD9853AFV
Technical Note
12) IC pin input This monolithic IC contains P+ isolation and PCB layers between adjacent elements in order to keep them isolated. P/N junctions are formed at the intersection of these P layers with the N layers of other elements to create a variety of parasitic elements. For example, when a resistor and transistor are connected to pins as shown in following chart, the P/N junction functions as a parasitic diode when GND > (Pin A) for the resistor or GND > (Pin B) for the transistor (NPN). Similarly, when GND > (Pin B) for the transistor (NPN), the parasitic diode described above combines with the N layer of other adjacent elements to operate as a parasitic NPN transistor. The formation of parasitic elements as a result of the relationships of the potentials of different pins is an inevitable result of the IC's architecture. The operation of parasitic elements can cause interference with circuit operation as well as IC malfunction and damage. For these reasons, it is necessary to use caution so that the IC is not used in a way that will trigger the operation of parasitic elements, such as by the application of voltages lower than the GND (PCB) voltage to input and output pins.
Resistance (PinA) (PinB) Transistor (NPN)

(PinA) Parasitic diode

(PinB)

P substrate Parasitic diode
P substrate
Parasitic elementals
Other adiacent components
Parasitic diode
Power Dissipation Reduction 1000
POWER DISSIPATION Pd(mW)
800
IC mounted on a ROHM standard board (70mm X 70mm X 1.6mm, glass epoxy)
600
400
200
0 0 25 50 75 100 125 150 175
AMBIENT TEMPERATURETa()
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15/16
2009.05 - Rev.A
BD9853AFV
Ordering part number
Technical Note
B
D
9
Part No.
8
5
3
A
F
V
-
E
2
Part No.
Package FV: SSOP-B16
Packaging and forming specification E2: Embossed tape and reel
SSOP-B16
5.00.2
16 9

Tape Quantity Embossed carrier tape 2500pcs E2
The direction is the 1pin of product is at the upper left when you hold
6.40.3
4.40.2
0.3Min.
Direction of feed
( reel on the left hand and you pull out the tape on the right hand
)
1
8
0.150.1
1.150.1
0.10
0.1 0.65 0.220.1
1pin
(Unit : mm)
Direction of feed
Reel
Order quantity needs to be multiple of the minimum quantity.
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16/16
2009.05 - Rev.A
Notice
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law.
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